Tengo más de un modelo de terceros que estoy tratando de importar al simulador en Eagle, que creo que es básicamente LTspice. Creo que los modelos que estoy importando son PSpice. Al menos a uno le falta la sintaxis .subckt y .ends, y otros tienen la sintaxis adecuada, pero recibo errores de que ciertas líneas no se pueden simular o que el modelo tiene una cantidad diferente de pines de la parte a la que lo estoy asignando. Cualquier ayuda es muy apreciada.
Sintaxis incorrecta:
.MODEL NST45010 pnp
+IS=6.40452e-13 BF=10000 NF=1.27689 VAF=1000
+IKF=0.0486984 ISE=3.50933e-14 NE=1.48639 BR=0.313958
+NR=1.5 VAR=455.615 IKR=0.486984 ISC=1e-16
+NC=3.99246 RB=0.1 IRB=0.1 RBM=0.1
+RE=0.375422 RC=3.90338 XTB=0.1 XTI=1
+EG=1.206 CJE=1.14119e-11 VJE=0.643535 MJE=0.236664
+TF=6.0309e-10 XTF=1000 VTF=582.623 ITF=12.2508
+CJC=9.13615e-12 VJC=0.4 MJC=0.389243 XCJC=0.800175
+FC=0.8 CJS=0 VJS=0.75 MJS=0.5
+TR=1e-07 PTF=0 KF=0 AF=1
Sintaxis incorrecta:
.MODEL NST45011 npn
+IS=2.13318e-12 BF=246.858 NF=1.25171 VAF=13.7501
+IKF=0.452519 ISE=3.43407e-10 NE=4 BR=24.6858
+NR=1.5 VAR=52.6697 IKR=4.52519 ISC=3.43407e-10
+NC=1.92734 RB=2 IRB=0.1 RBM=2
+RE=0.954359 RC=4.77179 XTB=5.22795 XTI=1
+EG=1.05 CJE=7.56956e-12 VJE=0.469867 MJE=0.31769
+TF=5.84833e-10 XTF=13.8699 VTF=48.1091 ITF=0.193693
+CJC=4.02125e-12 VJC=0.95 MJC=0.340626 XCJC=0.748803
+FC=0.8 CJS=0 VJS=0.75 MJS=0.5
+TR=1e-07 PTF=0 KF=0 AF=1
Ciertas líneas no se pueden simular:
* Model Usage Notes:
* 1. The following parameters are modeled:
* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)
* UNITY GAIN BANDWIDTH (GBW)
* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
* DIFFERENTIAL INPUT IMPEDANCE (Zid)
* COMMON-MODE INPUT IMPEDANCE (Zic)
* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* SLEW RATE (SR)
* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
* LARGE SIGNAL RESPONSE
* OVERLOAD RECOVERY TIME (tor)
* INPUT BIAS CURRENT (Ib)
* INPUT OFFSET CURRENT (Ios)
* INPUT OFFSET VOLTAGE (Vos)
* INPUT OFFSET VOLTAGE VS. TEMPERATURE (Vos Drift)
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)
*****************************************************************************
.subckt OPA1678 IN+ IN- VCC VEE OUT
******************************************************
* MODEL DEFINITIONS:
.model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=0)
.model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=500e-3 Voff=100e-3)
.model OL_SW VSWITCH(Ron=1e-3 Roff=1e12 Von=900e-3 Voff=800e-3)
.model OR_SW VSWITCH(Ron=10e-3 Roff=1e12 Von=10e-3 Voff=0)
.model R_NOISELESS RES(T_ABS=-273.15)
******************************************************
XV_OS N032 N044 VOS_DRIFT_OPA1678
R1 N036 N033 R_NOISELESS 1e-3
R2 N053 ESDn R_NOISELESS 1e-3
R3 N071 0 R_NOISELESS 1e12
C1 N071 0 1
R4 VCC_B N070 R_NOISELESS 1e-3
C2 N070 0 1e-15
C3 N072 0 1e-15
R5 N072 VEE_B R_NOISELESS 1e-3
G1 N036 N037 N005 N004 1e-3
R6 MID N049 R_NOISELESS 1e12
VCM_MIN N052 VEE_B 0.5
R7 N052 MID R_NOISELESS 1e12
VCM_MAX N049 VCC_B -2
XVCM_CLAMP N037 MID N045 MID N049 N052 VCCS_EXT_LIM_OPA1678
R8 N045 MID R_NOISELESS 1
C4 N046 MID 1e-15
R9 N045 N046 R_NOISELESS 1e-3
V4 N068 OUT 0
R10 MID N054 R_NOISELESS 1e12
R11 MID N055 R_NOISELESS 1e12
XIQp VIMON MID VCC MID VCCS_LIM_IQ_OPA1678
XIQn MID VIMON MID VEE VCCS_LIM_IQ_OPA1678
R12 VCC_B N009 R_NOISELESS 1e3
R13 N022 VEE_B R_NOISELESS 1e3
XCLAWp VIMON MID N009 VCC_B VCCS_LIM_CLAWp_OPA1678
XCLAWn MID VIMON VEE_B N022 VCCS_LIM_CLAWn_OPA1678
R14 VEE_CLP MID R_NOISELESS 1e3
R15 MID VCC_CLP R_NOISELESS 1e3
R16 N010 N009 R_NOISELESS 1e-3
R17 N023 N022 R_NOISELESS 1e-3
C5 MID N010 1e-15
C6 N023 MID 1e-15
R18 VOUT_S N055 R_NOISELESS 100
C7 VOUT_S MID 1e-12
G2 MID VCC_CLP N010 MID 1e-3
G3 MID VEE_CLP N023 MID 1e-3
XCL_AMP N007 N034 VIMON MID N013 N020 CLAMP_AMP_LO_OPA1678
V_ISCp N007 MID 50
V_ISCn N034 MID -37
XOL_SENSE_OPA1678 MID N042 N041 N051 OL_SENSE_OPA1678
R19 N034 MID R_NOISELESS 1e12
R20 N020 MID R_NOISELESS 1
C8 N021 MID 1e-15
R21 MID N013 R_NOISELESS 1
R22 MID N007 R_NOISELESS 1e12
C9 MID N014 1e-15
XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID N011 N018 CLAMP_AMP_LO_OPA1678
R23 VEE_CLP MID R_NOISELESS 1e12
R24 N018 MID R_NOISELESS 1
C10 N019 MID 1e-15
R25 MID N011 R_NOISELESS 1
R26 MID VCC_CLP R_NOISELESS 1e12
C11 MID N012 1e-15
XCL_SRC N014 N021 CL_CLAMP MID VCCS_LIM_4_OPA1678
XCLAW_SRC N012 N019 CLAW_CLAMP MID VCCS_LIM_3_OPA1678
R27 N011 N012 R_NOISELESS 1e-3
R28 N019 N018 R_NOISELESS 1e-3
R29 N013 N014 R_NOISELESS 1e-3
R30 N021 N020 R_NOISELESS 1e-3
R31 N042 MID R_NOISELESS 1
R32 N042 SW_OL R_NOISELESS 100
C12 SW_OL MID 1e-9
R33 VIMON N054 R_NOISELESS 100
C13 VIMON MID 1e-12
C_DIFF ESDp ESDn 6e-12
C_CMn ESDn MID 2e-12
C_CMp MID ESDp 2e-12
I_Q VCC VEE 2e-3
I_B N032 MID 10e-12
I_OS ESDn MID 1e-15
R34 IN+ ESDp R_NOISELESS 250
R35 IN- ESDn R_NOISELESS 250
R36 N024 MID R_NOISELESS 1
R37 N035 MID R_NOISELESS 1e12
R38 MID N016 R_NOISELESS 1
R39 MID N008 R_NOISELESS 1e12
XGR_AMP N008 N035 N015 MID N016 N024 CLAMP_AMP_HI_OPA1678
XGR_SRC N017 N025 CLAMP MID VCCS_LIM_GR_OPA1678
C17 MID N017 1e-15
C18 N025 MID 1e-15
V_GRn N035 MID -113
V_GRp N008 MID 113
R40 N016 N017 R_NOISELESS 1e-3
R41 N025 N024 R_NOISELESS 1e-3
R42 VSENSE N015 R_NOISELESS 1e-3
C19 MID N015 1e-15
R43 MID VSENSE R_NOISELESS 1e3
G5 N032 N033 N002 MID 1e-3
G8 MID CLAW_CLAMP N066 MID 1e-3
R45 MID CLAW_CLAMP R_NOISELESS 1e3
R47 N058 VCLP R_NOISELESS 100
C24 MID VCLP 1e-12
E4 N058 MID CL_CLAMP MID 1
E5 N055 MID OUT MID 1
H1 N054 MID V4 1e3
S1 N057 N056 SW_OL MID OL_SW
R52 MID ESDp R_NOISELESS 1e12
R53 ESDn MID R_NOISELESS 1e12
R58 N033 N032 R_NOISELESS 1e3
R59 N070 N071 R_NOISELESS 1e6
R60 N071 N072 R_NOISELESS 1e6
R67 N037 N036 R_NOISELESS 1e3
G15 MID VSENSE CLAMP MID 1e-3
V_ORp N031 VCLP 8.8
V_ORn N026 VCLP -8.8
V11 N028 N027 0
V12 N029 N030 0
H3 N040 MID V12 10
S6 VCC OUT OUT VCC ESD_SW
S7 OUT VEE VEE OUT ESD_SW
E1 N063 0 N071 0 1
S8 N029 CLAMP CLAMP N029 OR_SW
S9 CLAMP N028 N028 CLAMP OR_SW
Xi_nn ESDn MID FEMT_OPA1678
Xi_np N044 MID FEMT_OPA1678
XVCCS_LIMIT_1 N046 N053 MID N047 VCCS_LIM_1_OPA1678
XVCCS_LIMIT_2 N047 MID MID CLAMP VCCS_LIM_2_OPA1678
R44 N047 MID R_NOISELESS 1e6
R68 CLAMP MID R_NOISELESS 1e6
G7 MID N066 N065 MID 1e-6
R69 N066 MID R_NOISELESS 1e6
H2 N050 MID V11 -10
Xe_n N044 N043 VNSE_OPA1678
R51 N043 ESDp R_NOISELESS 1e-3
R71 N041 N040 R_NOISELESS 100
R72 N051 N050 R_NOISELESS 100
C27 N041 MID 1e-12
C28 N051 MID 1e-12
XVCCS_LIM_ZO_OPA1678 N062 MID MID N067 VCCS_LIM_ZO_OPA1678
Rdc3 N038 MID R_NOISELESS 1
R92 N038 N039 R_NOISELESS 1e4
R93 N039 MID R_NOISELESS 4.286e3
G24 MID N048 N039 MID 3.3333
C33 N039 N038 8.842e-13
R94 N048 MID R_NOISELESS 1
G25 MID N038 VSENSE MID 1
C36 CLAMP MID 1.806e-8
G4 MID CL_CLAMP CLAW_CLAMP MID 1e-3
R62 MID CL_CLAMP R_NOISELESS 1e3
R46 N002 MID R_NOISELESS 2e3
R48 N002 N001 R_NOISELESS 1e8
G9 MID N001 ESDp MID 20e-3
Rsrc2 N001 MID R_NOISELESS 1
C16 N002 N001 6.366e-12
C21 N004 N003 3.98e-10
R49 N004 MID R_NOISELESS 22.86
R50 N004 N003 R_NOISELESS 1e8
G10 MID N003 VEE_B MID 0.4375
Rsrc4 N003 MID R_NOISELESS 1
C14 N005 N006 3.98e-10
R54 N005 MID R_NOISELESS 22.86
R55 N005 N006 R_NOISELESS 1e8
G6 MID N006 VCC_B MID 0.4375
Rsrc1 N006 MID R_NOISELESS 1
Rx N068 N067 R_NOISELESS 1.45e5
Rdummy N068 MID R_NOISELESS 1.45e4
G11 MID N056 CL_CLAMP N068 88.5
Rdc1 N056 MID R_NOISELESS 1
R56 N056 N057 R_NOISELESS 1e8
R57 N057 MID R_NOISELESS 2.83e6
G12 MID N059 N057 MID 36.39
C15 N057 N056 2.14e-10
R61 N059 MID R_NOISELESS 1
R63 N059 N060 R_NOISELESS 9e8
R64 N060 N069 R_NOISELESS 1e8
C23 MID N069 3.18e-18
Gb2 MID N061 N060 MID 1
R65 N061 MID R_NOISELESS 1
R66 N061 N062 R_NOISELESS 1e8
R70 N062 MID R_NOISELESS 502.5e3
C25 N062 N061 3.18e-18
R73 N067 MID R_NOISELESS 1
G13 MID N027 N026 MID 1
G14 MID N030 N031 MID 1
R74 MID N027 R_NOISELESS 1
R75 MID N030 R_NOISELESS 1
S2 VCC ESDn ESDn VCC ESD_SW
S3 VCC ESDp ESDp VCC ESD_SW
S4 ESDn VEE VEE ESDn ESD_SW
S5 ESDp VEE VEE ESDp ESD_SW
S10 ESDp ESDn ESDn ESDp BB_SW
S11 ESDn ESDp ESDp ESDn BB_SW
G16 0 VCC_B VCC 0 1
G17 0 VEE_B VEE 0 1
R76 VCC_B 0 R_NOISELESS 1
R77 VEE_B 0 R_NOISELESS 1
G18 MID N064 N048 MID 1e-6
R79 N064 MID R_NOISELESS 1e6
G19 MID N065 N064 MID 1e-6
R80 N065 MID R_NOISELESS 1e6
C26 N064 MID 8.842e-16
C29 N065 MID 8.842e-16
C30 N066 MID 5.305e-16
RMID N063 MID R_NOISELESS 1e-2
.ends OPA1678
*
.subckt VOS_DRIFT_OPA1678 VOS+ VOS-
.param DC = 496.4e-6
.param POL = 1
.param DRIFT = 2E-06
E1 VOS+ VOS- VALUE={DC+POL*DRIFT*(TEMP-27)}
.ends
*
.subckt CLAMP_AMP_HI_OPA1678 VC+ VC- VIN COM VO+ VO-
.param G=10
GVo+ COM Vo+ Value = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVo- COM Vo- Value = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ends CLAMP_AMP_HI_OPA1678
*
.subckt OL_SENSE_OPA1678 1 2 3 4
GSW+ 1 2 Value = {IF((V(3,1)>10e-3 | V(4,1)>10e-3),1,0)}
.ends OL_SENSE_OPA1678
*
.subckt VCCS_EXT_LIM_OPA1678 VIN+ VIN- IOUT- IOUT+ VP+ VP-
.param Gain = 1
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ends VCCS_EXT_LIM_OPA1678
*
.subckt VCCS_LIM_3_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.226
.param Ineg = -0.226
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_3_OPA1678
*
.subckt VCCS_LIM_4_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.452
.param Ineg = -0.452
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_4_OPA1678
*
.subckt VCCS_LIM_CLAWp_OPA1678 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 0.8E-3)
+(30, 2.22e-3)
+(48, 3.93e-3)
+(49.6, 7.2e-3)
+(50.4, 1.8e-2)
.ends VCCS_LIM_CLAWp_OPA1678
*
.subckt VCCS_LIM_CLAWn_OPA1678 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 0.8E-3)
+(35.2, 3.41e-3)
+(36.8, 5.2e-3)
+(38, 1.8e-2)
.ends VCCS_LIM_CLAWn_OPA1678
*
.subckt VCCS_LIM_IQ_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 1e-3
G1 IOUT+ IOUT- VALUE={IF( (V(VC+,VC-)<=0),0,Gain*V(VC+,VC-) )}
.ends VCCS_LIM_IQ_OPA1678
*
.subckt VNSE_OPA1678 1 2
.param FLW=1
.param GLF=0.1048
.param RNV=18.0086
.model DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ends VNSE_OPA1678
*
.subckt CLAMP_AMP_LO_OPA1678 VC+ VC- VIN COM VO+ VO-
.param G=1
GVo+ COM Vo+ Value = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVo- COM Vo- Value = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ends CLAMP_AMP_LO_OPA1678
*
.subckt VCCS_LIM_GR_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 1
.param Ipos = 0.326
.param Ineg = -0.326
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_GR_OPA1678
*
.subckt VCCS_LIM_1_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 1e-4
.param Ipos = .5
.param Ineg = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_1_OPA1678
*
.subckt VCCS_LIM_2_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 20.36e-3
.param Ipos = 0.163
.param Ineg = -0.163
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_2_OPA1678
*
.subckt VCCS_LIM_ZO_OPA1678 VC+ VC- IOUT+ IOUT-
.param Gain = 200
.param Ipos = 14.5e3
.param Ineg = -14.5e3
G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)}
.ends VCCS_LIM_ZO_OPA1678
*
.subckt FEMT_OPA1678 1 2
.param NVRF=3
.param RNVF={1.184*PWR(NVRF,2)}
E1 3 0 5 0 10
R1 5 0 {RNVF}
R2 5 0 {RNVF}
G1 1 2 3 0 1e-6
.ends FEMT_OPA1678
*
Las secciones que dices que son impropias me parecen bien. Sin embargo, estos son modelos y no subcircuitos .
Un modelo proporciona parámetros (constantes) que se utilizarán en un conjunto de ecuaciones que ya están integradas en el simulador.
Un subcircuito es una colección de componentes más primitivos que están conectados entre sí.
un ciudadano preocupado
<pre>y</pre>al pegar el código. Por alguna razón, la última pieza parece demasiado grande para el intérprete y no se presentará correctamente como código. Tal vez sea una limitación en el sitio.un ciudadano preocupado
Xprefijo cuando use un.model, y viceversa. Simplemente copié y pegué el código directamente desde la edición de su pregunta (porque la última parte grande simplemente no aparecerá correctamente como código).