Temporizador1 en stm32f4

Realmente no me gusta el HAL, así que aquí le mostramos cómo hacer lo que quiere simplemente accediendo directamente al periférico del temporizador:

// SETUP STUFF:

// Enable the timer clock. I use the HAL for this
// as it adds the required startup delay. The code
// is pretty simple though.
__HAL_RCC_TIM1_CLK_ENABLE();

// Reset the control register. This gives us the 
// default operation which is counting up with no
// divider.
TIM1->CR1 = 0;

// Set prescaler
TIM1->PSC = 16799;

// Will generate interrupt when this value is reached
TIM1->ARR = 4999;

// The PSC and ARR values are currently in the preload
// registers. To load them into the active registers we
// need an update event. We can do this manually as
// follows (or we could wait for the timer to expire).
TIM1->EGR |= TIM_EGR_UG;

// Timer is now ready to use.

// POLLING OPERATION:

// Next we setup the interrupts. We should first clear
// the update interrupt flag in case it has already been
// set.
TIM1->SR = ~TIM_SR_UIF;

// Then we can enable the update interrupt source
TIM1->DIER |= TIM_DIER_UIE;

// Note: we also need to setup the interrupt channel on
// the NVIC. Once that is done the isr will fire
// when the timer reaches 5000.

// We can now start the timer running...
TIM1->CR1 |= TIM_CR_CEN;

while ((GPIOA->IDR  & GPIO_PIN_3) == 0x08) 
{
    Clk_h
    DWT_Delay(200);
    Clk_l
    DWT_Delay(200);
}

// ...and stop the timer when we're done
TIM1->CR1 &= ~TIM_CR_CEN;

// Note if we want to repeat the polling loop again we should
// issue another TIM1->EGR |= TIM_EGR_UG event as this
// resets the timer to zero.

Mi solución sería casi idéntica a la de @Jon, pero iniciaría el temporizador en modo de disparo único, para evitar una segunda interrupción cuando el procesamiento de la primera lleva demasiado tiempo. De esta manera, no se necesita la función de parada del temporizador.

void TIM1_Init() {
    // edit: added clock and interrupt enable
    __HAL_RCC_TIM1_CLK_ENABLE();
    NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0);
    NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);

    TIM1->PSC = 16799;         // prescaler
    TIM1->EGR = TIM_EGR_UG;    // generate an update event to load the prescaler
    TIM1->ARR = 4999;          // counter limit
    TIM1->SR = 0;              // clear interrupt status after the update event
    TIM1->DIER = TIM_DIER_UIE; // enable interrupt on update (overflow) event
}

void TIM1_Stop() {
    TIM1->CR1 = 0;             // stop timer by clearing CEN (and everything else) in CR1
    TIM1->CNT = 0;             // reset counter, so it will start from 0 at restart
}

void TIM1_Start() {
    TIM1->CR1 = TIM_CR1_CEN    // start the timer
        | TIM_CR1_OPM;         // in one-pulse-mode
}

void TIM1_UP_TIM10_IRQHandler(void) {
    TIM1->SR = 0;
    strcpy(str123,"<<FAIL>>"); // sprintf should not be used in an interrupt handler
    CDC_Transmit_FS((uint8_t*)str123,strlen(str123));
}

Lo siguiente es para TIM2 pero se pueden aplicar los mismos pasos para TIM1

#include "stm32f401xc.h"  // chip title


int data = 0;

int main()
{

NVIC_EnableIRQ(TIM2_IRQn); // Enable NVIC interrupt

RCC -> APB1ENR |= RCC_APB1ENR_TIM2EN;
RCC -> AHB1ENR |= RCC_AHB1ENR_GPIOAEN;

GPIOA->MODER = 1; // output_pp
GPIOA->ODR = 0;   // logic low

TIM2->DIER |= TIM_DIER_UIE; // enable interrupt
TIM2-> ARR = (uint32_t)0xff0;    // counter ceilling (max value the counter can has them start counting from the beginning)

TIM2-> PSC = 100;           // prescaler value
TIM1->SR = 0;               // disable all flags

TIM2-> CR1 |= 1;            // start timer



while(1)
{
    GPIOA ->ODR = data ;  // data is updated inside TIM2 ISR
}

    return 0;
}


void TIM2_IRQHandler(void) {
    TIM2->SR = 0;            // clear TIM2 ISR flag to not enter again once finished
    data = (1 ^ data) & 1;  // toggle the value of data 1 -> 0 -> 1 -> ...
}